Channel marking for chip mark overflow and calibration errors
US8793544B2 · kind B2 · utility
5Cited by
10References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2010 |
| Grant date | Jul 29, 2014 |
| Priority date | — |
| Expiry date | Oct 19, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/1064
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Marking memory chips as faulty when a fault is detected in data from the memory chip. Upon detecting that a plurality of memory chips are faulty, determining which of a plurality of memory channels contains the faulty memory chips. Marking one of a plurality of memory channels as failing in response to determining that the number of failing memory chips has exceeded a threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.