Printed, self-aligned, top gate thin film transistor
US8796125B2 · kind B2 · utility
13Cited by
22References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2007 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Jul 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A self-aligned top-gate thin film transistor (TFT) and a method of forming such a thin film transistor, by forming a semiconductor thin film layer; printing a doped glass pattern thereon, a gap in the doped glass pattern defining a channel region of the TFT; forming a gate electrode on or over the channel region, the gate electrode comprising a gate dielectric film and a gate conductor thereon; and diffusing a dopant from the doped glass pattern into the semiconductor thin film layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.