Low voltage tunnel field-effect transistor (TFET) and method of making same

US8796733B2 · kind B2 · utility

Assignees

• University of Notre Dame du Lac · US
• International Business Machines Corporation · US

Inventors

• Alan C. Seabaugh · South Bend, US
• Patrick Fay · Granger, US
• Huili (Grace) Xing · South Bend, US
• Guangle Zhou · Fremont, US
• Yeqing Lu · Notre Dame, US
• Mark A. Wistey · South Bend, US
• Siyuranga O. Koswatta · Carmel, US

Key dates

• Filing date: Aug 9, 2011
• Grant date: Aug 5, 2014
• Expiry date: Oct 28, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D12/211

Abstract

A low voltage tunnel field effect transistor includes a p-n tunnel junction, a gate-dielectric, a gate, a source-contact, and a drain-contact. The p-n tunnel junction includes a depletion region interfacing together a source-layer and a drain-layer. The depletion region includes a source-tunneling-region of the source-layer and a drain-tunneling-region of the drain-layer. When no external electric field is imposed, the depletion region of the p-n tunnel junction has an internal electric field that substantially points towards the source-tunneling-region and the drain-tunneling-region. The gate-dielectric is interfaced directly onto the drain-tunneling-region such that the drain-tunneling-region is between the source-tunneling-region and the gate-dielectric. The gate is interfaced onto the gate-dielectric such that the gate is configured to impose an external electric field which is oriented substantially in parallel to the internal electric field of the depletion region.