Semiconductor device
US8796744B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2012 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Dec 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
Abstract
The present invention discloses a semiconductor device, which comprises a substrate, a buffer layer on the substrate, an inversely doped isolation layer on the buffer layer, a barrier layer on the inversely doped isolation layer, a channel layer on the barrier layer, a gate stack structure on the channel layer, and source and drain regions at both sides of the gate stack structure, characterized in that the buffer layer and/or the barrier layer and/or the inversely doped isolation layer are formed of SiGe alloys or SiGeSn alloys, and the channel layer is formed of a GeSn alloy. The semiconductor device according to the present invention uses a quantum well structure of SiGe/GeSn/SiGe to restrict transportation of carriers, and it introduces a stress through lattice mis-match to greatly increase the carrier mobility, thus improving the device driving capability so as to be adapted to high-speed and high-frequency application.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.