Semiconductor devices with strained source/drain structures
US8796788B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2011 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Nov 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
An integrated circuit device and method for manufacturing the integrated circuit device is disclosed. The disclosed method provides a processing for forming improved source/drain features in the semiconductor device. Semiconductor devices with the improved source/drain features may prevent or reduce defects and achieve high strain effect resulting from epi layers. In an embodiment, the source/drain features comprises a second portion surrounding a first portion, and a third portion between the second portion and the semiconductor substrate, wherein the second portion has a composition different from the first and third portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.