Patent · US Active

Low-power high-resolution time-to-digital converter

US8797203B2 · kind B2 · utility

4Cited by
3References
8Claims
0Family size

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Inventor

Key dates

Filing dateJan 17, 2013
Grant dateAug 5, 2014
Priority date
Expiry dateJan 17, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG04F10/005
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Disclosed is a low-power and high-resolution time-to-digital converter including: a coarse delay cell configured to delay a reference clock by a coarse delay time and output the reference clock; a rising-edge retimer configured to output a rising-edge retimed clock synchronized with the rising-edge of a DCO clock in response to the reference clock; a falling-edge retimer configured to output a falling-edge retimed clock synchronized with the falling-edge of the DCO clock; a first sampler configured to latches output of the coarse delay cell in response to the rising-edge retimed clock and the falling-edge retimed clock; and a pseudo-thermometer code edge detector configured to detect a rising-edge fractional phase error between the reference clock and the rising-edge retimed clock as a coarse phase error from a signal output by the first sampler, and detect a falling-edge fractional phase error between the reference clock and the falling-edge retimed clock.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.