Static RAM
US8797786B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 7, 2011 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Sep 7, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A static RAM includes a plurality of word lines, a plurality of global bit line pairs, a plurality of static-type memory cells, a plurality of sense amplifiers, a plurality of local bit line pairs provided in correspondence with each global bit line pair, and a plurality of global switches, wherein the plurality of static-type memory cells is connected to the corresponding local bit line pair in response to a row selection signal, and at the time of read, the row selection signal is applied to the word line and after the corresponding local bit line pair is brought into a state corresponding to contents stored in the memory cell, application of the row selection signal is stopped and then the corresponding global switch is brought into a connection state and after changing the state of the global bit line pair, the corresponding sense amplifier is operated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.