Semiconductor memory and semiconductor memory control method
US8797807B2 · kind B2 · utility
2Cited by
22References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2012 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Sep 27, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2245
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, the semiconductor memory includes a memory cell array which includes memory cells to store data, a buffer circuit which includes latches, each of the latches including transistors as control elements and a flip-flop, and a control circuit which turns off the transistors to deactivate one or more of the latches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.