Digital video physical layer using a multi-level data code
US8798189B2 · kind B2 · utility
7Cited by
6References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 10, 2011 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Nov 10, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2370/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system for communicating data comprises a clock channel configured to transmit a clock signal at a predetermined rate and at least one data channel configured to transmit data as a sequence of blocks of multi-level symbols being sent at a fixed multiple of the clock rate. Each block of multi-level symbols comprises a sequence of at least three multi-level symbols. Each multi-level symbol has an analog voltage level selected from a predetermined number of possible values, the predetermined number being an integer greater than two. The fixed multiple of the clock rate is an integer greater than one.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.