Method and digital circuit for recovering a clock and data from an input signal using a digital frequency detection
US8798217B2 · kind B2 · utility
6Cited by
9References
47Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 3, 2010 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | May 31, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a particular embodiment, a digital circuit includes a frequency detection circuit operative to compare information related to transitions between sequential samples of a received signal. The frequency detection circuit is further operative to generate a control signal to reduce a sampling rate of the received signal in response to a predetermined number of the sequential samples having a same value. The digital circuit also includes a digital phase detector operative to provide the information related to the transitions between sequential samples to the frequency detection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.