TFT mask reduction
US8801948B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2012 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Oct 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0231
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure relate to display devices and methods for manufacturing display devices. Specifically, embodiments of the present disclosure employ a halftone photoresist layer useful for reducing a number of masks needed to manufacture TFT backplane (e.g., thin-film transistors (TFTs) with fringe-field shifting). The halftone photoresist layer defines two areas, one defining an etching area for a first layer (e.g., a common voltage layer) and the other defining an etching area for a second layer (e.g., an organic passivation layer).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.