Semiconductor device having chip crack detection structure
US8803308B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 20, 2013 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Dec 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a plurality of signal terminals on each of a plurality of vertically stacked semiconductor chips, each plurality of signal terminals connected to vertically aligned signal terminals of an adjacent semiconductor chip by through silicon vias, a common test terminal on each of the plurality of vertically stacked semiconductor chips connected to a vertically aligned common test terminal of an adjacent semiconductor chip by a through silicon via; a plurality of spiral test terminals on the plurality of vertically stacked semiconductor chips, each spiral test terminal connected to a non-vertically aligned spiral test terminal of an adjacent semiconductor chip by a through silicon via, and a conductive line arranged along a periphery of at least one of the plurality of vertically stacked semiconductor chips, the conductive line connected to a respective common test terminal and a respective spiral test terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.