Oscillators and clock generation
US8803617B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2012 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Sep 14, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0322
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Oscillator circuitry having a switching inverting amplifier arranged in a ring oscillator configuration of at least two stages. A bias generator for supplying the amplifiers of neighboring stages, is responsive to an enable signal to supply the amplifiers only when the enable signal is asserted. A first pair of transistors, coupled to an input of one of the amplifiers and the other coupled to an output of the amplifier, the transistors being driven in common by the enable signal such that when the enable signal is deasserted the transistors of the pair are turned on to impose conflicting levels at the input and the output such that the amplifier is forced to switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.