Bidirectional shift register and image display device using the same
US8803783B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 21, 2011 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Oct 13, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A plurality of cascaded unit register circuits which comprises a bidirectional shift register include main stages and dummy stages at the top before the main stages and dummy stages at the bottom after the main stages. A k-th stage outputs a pulse Pk in synchronization with a clock signal with a reference point N1 being at H level. The main stages include terminals NSF and NSB for setting N1 to H to which Pk−1 and Pk+1 are input, respectively, and terminals NRB and NRF for setting N1 to L level to which Pk−2 and Pk+2 are input, respectively. The order of generation of clock signals is reversed according to the direction of a shift, and whether a start trigger signal is applied to a top stage or a bottom stage is switched. Top dummy stages do not have NRB. Bottom dummy stages do not have NRF.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.