Systems and methods for inter-track interference compensation
US8804260B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2011 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Aug 17, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/2516
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.