Non-volatile semiconductor memory device
US8804401B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2012 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Aug 31, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/73
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory device includes a cell array layer including a first wire, a memory cell, and a second wire, and a control circuit. When performing set operation for setting the memory cell to a low resistance state, until a resistance value of the memory cell becomes lower than a predetermined resistance value, the control circuit repeating: applying a first voltage for setting to the memory cell; and a verify read verifying that the resistance value of the memory cell has become lower than the predetermined resistance value. After the verify read, the control circuit applies a second voltage having a different polarity from the first voltage to the memory cell before applying the first voltage that follows.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.