Low overhead read disturbance protection method for NAND flash device
US8804418B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 31, 2012 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Oct 9, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3427
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides for a solution benefiting from providing for a method and system to reduce the impact of read disturbance while providing improved system performance through optimized activities with minimal impact to overhead. The present invention provides for a highly effective early page migration mechanism, prior to a manufacturer's endurance limit and without a forced block migration, to reduce read disturbance associated with traditional NAND-based memory architectures, in part by identifying a block counter value, determining a block threshold value and early migrating one or more pages of data from the original block location upon the satisfaction of certain criteria.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.