Method of hybrid compression acceleration utilizing special and general purpose processors
US8806292B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2011 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Jun 11, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6312
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A hybrid mechanism whereby hardware acceleration is combined with software such that the compression rate achieved is significantly increased while maintaining the original compression ratio (e.g., using full DHT and not SHT or an approximation). The compression acceleration mechanism is applicable to a hardware accelerator tightly coupled with the general purpose processor. The compression task is divided and parallelized between hardware and software wherein each compression task is split into two acceleration requests: a first request that performs SHT encoding using hardware acceleration and provides post-LZ frequency statistics; and a second request that performs SHT decoding and DHT encoding using the DHT generated in software.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.