Methods for fabricating self-aligning semicondutor heterostructures using silicon nanowires
US8809093B2 · kind B2 · utility
11Cited by
14References
5Claims
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Key dates
| Filing date | Nov 18, 2010 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | May 4, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/762
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for fabricating self-aligned heterostructures and semiconductor arrangements using silicon nanowires are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.