Semiconductor device and power conversion apparatus using the same
US8809903B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2013 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Aug 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/112
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device provides a gate electrode formed on a lateral face of a wide trench, and thereby the gate electrode is covered by a gate insulating layer and a thick insulating layer to be an inter layer. Therefore, a parasitic capacitance of the gate becomes small, and there is no potential variation of the gate since there is no floating p-layer so that a controllability of the dv/dt can be improved. In addition, the conductive layer between the gate electrodes can relax the electric field applied to the corner of the gate electrode. In consequence, compatibility of low loss and low noise and high reliability can be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.