Semiconductor memory devices
US8809930B2 · kind B2 · utility
4Cited by
2References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2013 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Jan 16, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Semiconductor memory devices may include a write transistor including a first write gate controlling a first source/drain terminal and a second write gate controlling a channel region, and a read transistor including a memory node gate connected to the first source/drain terminal of the write transistor. The first write gate may have a first work function and the second write gate may have a second work function different from the first work function. The first source/drain terminal of the write transistor may not have a PN junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.