Fractional phase locked loop having an exact output frequency and phase and method of using the same
US8810290B1 · kind B1 · utility
11Cited by
5References
25Claims
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Key dates
| Filing date | Jan 10, 2012 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Jan 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0994
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A fractional-N frequency synthesizer having an exact output frequency and phase includes a phase locked loop including a phase detector responsive to a reference signal and a fractional divider. The phase locked loop has an output signal whose frequency is a fractional multiple of the input reference signal. The synthesizer also includes a modulator having a modulus for providing an output to the fractional divider, in which the modulus multiplied by the ratio of the frequency of the output signal to the frequency of the reference signal is a non-integer number.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.