Stochastic Time-Digital Converter
US8810440B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2012 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | May 29, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG04F10/005
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A stochastic time-digital converter (STDC) including an input switching circuit, an STDC array, and an encoder. A clock circuit inputs two clock signals into two input terminals of the input switching circuit; the input switching circuit transmits the two clock signals in a cyclic cross-transposition form to two input terminals of the STDC array, and simultaneously outputs a trigger control signal to the encoder; each comparator in the STDC array independently judges the speeds of the two clock signals and sends the judgement results to the encoder for collection and processing; and the encoder outputs the size and positivity or negativity of the phase difference of the two clock signals. The technical solution utilizes the stochastic characteristic of the STDC to double the number of the equivalent comparators in the STDC array, eliminating the effects on the circuitry of device mismatching and processes, power supply voltage, and temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.