Shift register unit, shift register, display panel and display
US8810499B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2012 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Feb 12, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The disclosure discloses a shift register unit, a shift register, a display panel and a display, and belongs to display driving technology. The shift register unit comprises: twelve transistors M1, M2, . . . , M12; one capacitor C1; four signal input terminals INPUT, RESET, CLK, CLKB; one signal output terminal OUTPUT; and one or more power supply terminals. The disclosure may decrease the output delay and attenuation, and improve an anti-interference capability, so that the shift register may operate stably and a driving margin of the shift register could be increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.