Closed loop power normalized timing recovery for 8 VSB modulated signals
US8811534B2 · kind B2 · utility
0Cited by
11References
4Claims
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Key dates
| Filing date | Apr 21, 2009 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Apr 21, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/06
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver timing error recovery loop expands the bandwidth of a received signal and determines the timing error based on the bandwidth expanded received signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.