Echo canceler circuit and method
US8811603B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2012 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Jul 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M9/082
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An echo canceler circuit (10) and method attenuates at least post-echo canceler uplink data (90) to produce attenuated uplink data (100) in response to uplink echo return loss based attenuation data (40). The echo canceler circuit (10) includes an echo return loss based attenuation data generator (20) and at least an uplink data attenuator (30). The echo return loss based attenuation data generator (20) produces the uplink echo return loss based attenuation data (40) in response to echo return loss data (70). The echo return loss data (70) is based on at least one of: attenuated downlink data (50), pre-echo canceler uplink data (60), and/or amplifier gain data (80). The uplink data attenuator (30) attenuates the post-echo canceler uplink data (90) to produce attenuated uplink data (100) based on the uplink echo return loss based attenuation data (40).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.