Designing digital processors using a flexibility metric
US8812285B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2011 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Apr 19, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques, structures, and systems are disclosed for implementing an efficient design of computer hardware using a top-to-bottom approach. In one aspect, a method for designing a processor includes generating an initial architecture for a processor to execute algorithms, simulating execution of the algorithms by the initial architecture to determine a modification to the initial architecture, and creating a processor design based on the modification to the initial architecture. The described method for implementing a hardware design tool provides a push-button transition from high level specification for algorithms to hardware description language.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.