Thin film transistor array substrate and method for manufacturing the same
US8815692B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2013 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Feb 25, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6739
Abstract
A thin film transistor array substrate having excellent characteristics and a method for manufacturing the same are disclosed. The thin film transistor array substrate includes a substrate, a gate electrode positioned on the substrate, a gate insulating layer positioned on the gate electrode, an active layer which is positioned on the gate insulating layer and includes a channel, an ohmic contact layer positioned on the active layer, and a source electrode and a drain electrode which are respectively connected to both sides of the active layer through the ohmic contact layer. The gate insulating layer includes a phosphorus-doped layer positioned adjacent to the active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.