Method of fabricating semiconductor device
US8815697B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2012 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | May 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/033
Abstract
Provided is a method of manufacturing a semiconductor device having a capacitor. The method includes forming a composite layer, including sequentially stacking on a substrate alternating layers of first through nth sacrificial layers and first through nth supporting layers. A plurality of openings that penetrate the composite layer are formed. A lower electrode is formed in the plurality of openings. At least portions of the first through nth sacrificial layers are removed to define a support structure for the lower electrode extending between adjacent ones of the plurality of openings and the lower electrode formed therein, the support structure including the first through nth supporting layers and a gap region between adjacent ones of the first through nth supporting layers where the first through nth sacrificial layers have been removed. A dielectric layer is formed on the lower electrode and an upper electrode is formed on the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.