Zero dead time, high event rate, multi-stop time-to-digital converter

US8816273B2 · kind B2 · utility

Assignee

• The United States of America as represented by the Administrator of the National Aeronautics and Space Administration · US

Inventors

• George Suarez · Columbia, US
• Jeffrey J. Dumonthier · Ashburn, US

Key dates

• Filing date: Aug 27, 2012
• Grant date: Aug 26, 2014
• Expiry date: Mar 1, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01J49/40
• WIPO field: Electrical machinery, apparatus, energy
• WIPO sector: Electrical engineering

Abstract

Time-to-digital converters adapted to analog and digital inputs and methods of use are described. A time-to-digital converter has an event frame latches and logic module with memory cells, an analog front-end module connected to the memory cells, and a bin increment generator module connected to the memory cells. The bin increment generator is configured to issue bin increments separated by a time increment, and the analog front end is configured to issue a start event followed by a plurality of stop events. Upon receipt of a first time increment following a start event, the event frame latches and logic module updates a first memory cell with a first bit-type; upon receipt of a second time increment following an intervening stop event, the event frame latches and logic module updates a second memory cell with a second bit-type different from the first bit-type.