Semiconductor device and method for manufacturing semiconductor device
US8816324B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 23, 2011 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Mar 31, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/833
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Disclosed is a semiconductor device (10) which comprises a glass substrate (12), a lower electrode layer (14), an n-type doped polycrystalline silicon semiconductor layer (16), a low-temperature insulating film (20) in which openings (22, 23) that serve as nuclei for growth of a nanowire (32) are formed, the nanowire (32) that is grown over the low-temperature insulating film (20) and has a core-shell structure, an insulating layer (50) that surrounds the nanowire (32), and an upper electrode layer (52). The nanowire (32) comprises an n-type GaAs core layer and a p-type GaAs shell layer. Alternatively, the nanowire can be formed as a nanowire having a quantum well structure, and InAs that can allow reduction of the process temperature can be used for the nanowire.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.