GPU pipeline synchronization and control system and method
US8817029B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2006 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Dec 5, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics pipeline configured to synchronize data processing according to signals and tokens has at least four components. The first component has one input and one output and communicates output tokens or wire signals after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The second component has one input and a plurality of outputs and communicates tokens or wire signals on one of the outputs after receiving tokens on the input, an internal event occurrence, or receipt of a signal on an input path. The third component has a plurality of inputs and one output and communicates tokens or wire signals on the output after receiving tokens on one of the inputs, an internal event occurrence, or receipt of a signal on an input path. The fourth component has a plurality of inputs and a plurality of outputs and has the capabilities of both the third and forth components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.