Column parallel readout image sensors with shared column analog-to-digital converter circuitry
US8817153B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2012 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Sep 5, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Electronic devices may include image sensors having image sensor pixels arranged in rows and columns. Pixels arranged along a column may be coupled to a common column line. Two or more column lines may by coupled to a shared analog-to-digital converter circuit. The shared analog to digital converter circuit may sample and hold reset-level or image-level voltages presented on the column line. The shared analog to digital converter circuits may pre-amplify and convert the voltages to digital signals. The shared analog-to-digital converter may simultaneously sample pixel voltages for all columns in a selected row of the pixel array. The image sensor may read the converted signals out of memory for an active row in the pixel array while simultaneously sampling and holding the voltages for the next row of the pixel array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.