Current controlled recall schema
US8817536B2 · kind B2 · utility
10Cited by
21References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2007 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Sep 17, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/0063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory circuit includes a controlled current source coupled to an input to a nonvolatile cell, and a second controlled current source coupled to a volatile cell, the volatile cell coupled to receive current from the controlled current source via the nonvolatile cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.