Linear equalizer with passive network and embedded level shifter
US8817863B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2012 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Dec 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03885
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The disclosed embodiments relate to the design of a linear equalizer that supports low-power, high-speed data transfers. In some embodiments, this linear equalizer contains a passive network that provides selective frequency peaking in a frequency range associated with a falling edge of a frequency response of the channel. It also includes a level shifter coupled between the channel and the passive network, wherein the level shifter is an active component that provides amplification and/or level-shifting. Moreover, the linear equalizer is designed so that power from the level shifter facilitates the selective frequency peaking of the passive network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.