Method for manufacturing semiconductor device
US8822303B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2012 |
| Grant date | Sep 2, 2014 |
| Priority date | — |
| Expiry date | Sep 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7682
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor component that including the following steps is provided. A plurality of stacked structures is formed on a substrate. A first dielectric layer is formed to cover the stacked structures, wherein the first dielectric layer has a plurality of overhangs, the overhangs wrap top portions of the stacked structures. A dry conformable etching process is performed to conformably remove the first dielectric layer until a portion of the first dielectric layer located outside of the overhangs is removed. A second dielectric layer is formed on the stacked structures, wherein the second dielectric layer connects the adjacent overhangs to form an air gap between the stacked structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.