Scalable distributed parallel access memory systems with internet routing applications
US8825896B2 · kind B2 · utility
0Cited by
8References
33Claims
0Family size
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Key dates
| Filing date | Jun 10, 2004 |
| Grant date | Sep 2, 2014 |
| Priority date | — |
| Expiry date | Jun 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3009
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a system, a memory controller separates a memory into multiple banks and enables a plurality of selected banks to be accessed concurrently. The memory controller further comprises a logic that creates a representation of a tree structure in memory and builds routing tables accessed by pointers at nodes in the tree memory structure, and a logic that finds a target memory address based on a received Internet Protocol (IP) address used by the tree memory structure and the routing table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.