Multilayer packaged semiconductor device and method of packaging
US8829692B2 · kind B2 · utility
2Cited by
17References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2012 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Sep 12, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One embodiment is a packaged device having multiple layers. Another embodiment is a method of forming a packaged device having multiple layers. Conductive layers and insulating layers can be formed with openings exposing semiconductor devices. The semiconductor devices can be wire-bonded to the conductive layers. In some embodiments, parasitic effects and a relative footprint of the packaged device can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.