Track and hold circuit and method
US8830095B2 · kind B2 · utility
3Cited by
5References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 19, 2013 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Feb 19, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A track and hold circuit has a main transistor for which the gate voltage is provided by a buffer circuit which is supplied with a different voltage supply than the circuit of the main transistor. This avoids the need for a bootstrap circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.