Receiver circuit and associated method
US8831549B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2013 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Mar 12, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/305
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A receiver circuit, e.g., a low-IF receiver, including two mixing paths. The two mixing paths scale an input signal respectively by two mixing gains and shift phase of the input signal respectively by two mixing phase offsets to provide two mixed signals. The two mixing gains and the two mixing phase offsets are arranged to produce an amplitude adjustment between amplitudes of the two mixed signals and a phase difference of 90 degrees plus a phase adjustment between phases of the two mixed signals. With the amplitude adjustment and/or the phase adjustment properly tuned to nonzero value(s) in association with band-pass response of the receiver circuit, image rejection can be achieved and optimized. Associated method is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.