Electronic charge sharing CMOS-memristor neural circuit
US8832009B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2012 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Mar 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/0007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
CMOS-memristor circuit is constructed to behave as a trainable artificial synapse for neuromorphic hardware systems. The invention relies on the memristance of a memristor at the input side of the device to act as a reconfigurable weight that is adjusted to realize a desired function. The invention relies on charge sharing at the output to enable the summation of signals from multiple synapses at the input node of a neuron circuit, implemented using a CMOS amplifier circuit. The combination of several memristive synapses and a neuron circuit constitute a neuromorphic circuit capable of learning and implementing a multitude of possible functionalities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.