Data packing and unpacking engine
US8832346B2 · kind B2 · utility
1Cited by
9References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 16, 2003 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Mar 11, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are disclosed to transfer data between a first bus internal to a system-on-chip (SOC) device and a second bus external to the SOC device, each bus having a plurality of bus segments shared among a plurality of peripheral devices communicating over one or more bus segments. When reading data from a peripheral device, the system packs data by enabling each effected first bus data segment in sequence until requested data is packed; and when writing data to a peripheral device, the system unpacks data by enabling each effected second bus data segment in sequence until requested data is unpacked.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.