Methods of fabricating semiconductor memory devices including support patterns
US8835315B2 · kind B2 · utility
4Cited by
18References
15Claims
0Family size
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Key dates
| Filing date | Feb 10, 2012 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Feb 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/033
Abstract
A capacitor dielectric can be between the storage node and the electrode layer. A supporting pattern can be connected to the storage node, where the supporting pattern can include at least one first pattern and at least one second pattern layered on one another, where the first pattern can include a material having an etch selectivity with respect to the second pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.