Digitally displaying inspection system for ESD protection chip
US8836353B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2012 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Mar 10, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/04
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention provides a digitally displaying inspection system for ESD protection chip, which includes an LVDS connector, a display system, first, second, and the third data lines, a power supply, and a resistor. The first, second, and third data lines each have an end electrically connected to the LVDS connector and an opposite end electrically connected to the display system. The display system includes a logic operation module and a digital display module electrically connected to the logic operation module. The logic operation module is electrically connected to the first, second, and third data lines. When an ESD protection chip is electrically connected to the LVDS connector, the logic operation module samples signals on the first, second, and third data lines and drive, after carrying out logic operations, the digital display module to display character signs, which can identify if the ESD protection chip is incorrectly connected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.