Snubber circuit
US8837102B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 26, 2011 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | May 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/047
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A circuit comprising a first transistor group configured to electrically isolate, at least in part, a second transistor group from an input voltage; the second transistor group configured to provide voltage protection to a third transistor group; and the third transistor group configured to switch on and off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.