Patent · US Active

Cache collaboration in tiled processor systems

US8838915B2 · kind B2 · utility

0Cited by
3References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 29, 2012
Grant dateSep 16, 2014
Priority date
Expiry dateMar 12, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/271
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The present invention may provide a computer system including a plurality of tiles divided into multiple virtual domains. Each tile may include a router to communicate with others of said tiles, a private cache to store data, and a spill table to record pointers for data evicted from the private cache to a remote host, wherein the remote host and the respective tile are provided in the same virtual domain. The spill tables may allow for faster retrieval of previously evicted data because the home registry does not need to be referenced if requested data is listed in the spill table. Therefore, embodiments of the present invention may provide a distance-aware cache collaboration architecture without incurring extraneous overhead expenses.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.