Apparatus, method, and system for implementing micro page tables
US8838935B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2010 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Sep 13, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment the apparatus is a micro-page table engine that includes logic that is capable of receiving a memory page request for a page in global memory address space. The apparatus also includes a translation lookaside buffer (TLB) that is capable of storing one or more memory page address translations. Additionally, the apparatus also has a page miss handler capable of performing a micro physical address lookup in a page miss handler tag table in response to the TLB not storing the memory page address translation for the page of memory referenced by the memory page request. The apparatus also includes memory management logic that is capable of managing the page miss handler tag table entries.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.