Chip having a driving integrated circuit
US8841781B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2011 |
| Grant date | Sep 23, 2014 |
| Priority date | — |
| Expiry date | Feb 7, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15788
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip having a bump layout suitable for the chip on glass technology and a driving IC includes a plurality of first bumps and a plurality of second bumps for electrically connecting to a glass substrate of a displayer. The first and second bumps are disposed on a surface of the chip and near two opposite long sides of the chip respectively. The ratio of the total contacting area of the first bumps to that of the second bumps is between 0.8 and 1.2. Thus, a pressure applied on the chip and the glass substrate of the displayer for connection can be uniformly exerted all over the chip, and the stability of the connection is therefore improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.