Electrical connection defect simulation test method and system of the same
US8843357B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2011 |
| Grant date | Sep 23, 2014 |
| Priority date | — |
| Expiry date | Jul 17, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318357
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An electrical connection defect simulation test method is provided. The electrical connection state simulation test method includes the steps as follows. A device under test is provided, wherein the device under test includes a plurality of pin groups each having a plurality of signal pins. A zero-frequency signal is transmitted from a signal-feeding device to each of the signal pins to simulate an open condition. An open test is performed on each of the signal pins. The signal pins of the device under test are connected to a relay matrix. The relay matrix is controlled to make any two of the signal pins in one of the pin groups electrically connected to simulate a short condition. A short test is performed on any two of the electrically connected signal pins. An electrical connection state simulation test system is disclosed herein as well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.