Reversible write-protection for non-volatile semiconductor memory device
US8843695B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 2011 |
| Grant date | Sep 23, 2014 |
| Priority date | — |
| Expiry date | Jun 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1425
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A serial memory device having a non-volatile memory array including a plurality of memory blocks, one or more said plurality of blocks being capable of being placed in a locked or an unlocked state upon receiving designated lock or unlock signal sequences is provided. The unlock signal sequences comprises at least two sequential signal sequences: a first unlock sequence, which has 1 to 7 signal bits, is applied to one of address input pins or a logic low enabled write-protection input pin and a second unlock sequence follows the first unlock signal sequence and is applied to a serial data access pin. The memory device further comprising a control logic circuit block coupled to a write-protection circuit block to provide means to identify the designated lock and unlock signal sequences and to set a protection state in a security area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.